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Single Instruction stream, Multiple Task (SIMT), is a chip architecture that provides a fresh approach to handling multimode baseband processing for wireless chips.
According to is creators at Coresonic, a Swedish company that spun out of Linkping University, SIMT has all the computational punch of VLIW but without the downsides of high control overhead and program memory usage.
It's mostly a matter of optimization. Hardware acceleration is supplied for high use operations but software is used wherever possible. The hardware is designed to be flexible enough for reused between wireless standards.
In addition to acceleration, other aspects of the architecture are what one might call "the obvious suspects:" parallelism, an innovative interconnect scheme and efficient communication between processor cores.
Just as VLIW has found a place in the architectural landscape, I suspect SIMT will as well because as fabrication technology progresses innovations that were not viable a generation before become possible.
SIMT is the subject of this week's feature article in WirelessNetDesignline. More information is available at /www.wirelessnetdesignline.com/howto/207801156.
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